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C/C++ Source or Header  |  1999-09-17  |  3.4 KB  |  157 lines
  1. /*
  2.  * include/asm-arm/arch-vnc/irq.h
  3.  *
  4.  * Copyright (C) 1998 Russell King
  5.  *
  6.  * Changelog:
  7.  *   22-08-1998    RMK    Restructured IRQ routines
  8.  */
  9.  
  10. #include <asm/dec21285.h>
  11. #include <asm/irq.h>
  12.  
  13. /*
  14.  * FootBridge IRQ translation table
  15.  *  Converts form our IRQ numbers into FootBridge masks (defined in irqs.h)
  16.  */
  17. static int fb_irq_mask[16] = {
  18.     0,
  19.     IRQ_MASK_SOFTIRQ,
  20.     IRQ_MASK_UART_DEBUG,
  21.     0,
  22.     IRQ_MASK_TIMER0,
  23.     IRQ_MASK_TIMER1,
  24.     IRQ_MASK_TIMER2,
  25.     IRQ_MASK_WATCHDOG,
  26.     IRQ_MASK_ETHER10,
  27.     IRQ_MASK_ETHER100,
  28.     IRQ_MASK_VIDCOMP,
  29.     IRQ_MASK_EXTERN_IRQ,
  30.     IRQ_MASK_DMA1,
  31.     0,
  32.     0,
  33.     IRQ_MASK_PCI_ERR
  34. };
  35.  
  36. static void vnc_mask_csr_irq(unsigned int irq)
  37. {
  38.     *CSR_IRQ_DISABLE = fb_irq_mask[irq];
  39. }
  40.  
  41. static void vnc_unmask_csr_irq(unsigned int irq)
  42. {
  43.     *CSR_IRQ_ENABLE = fb_irq_mask[irq];
  44. }
  45.  
  46. static void vnc_mask_pic_lo_irq(unsigned int irq)
  47. {
  48.     unsigned int mask = 1 << (irq & 7);
  49.  
  50.     outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
  51. }
  52.  
  53. static void vnc_mask_ack_pic_lo_irq(unsigned int irq)
  54. {
  55.     unsigned int mask = 1 << (irq & 7);
  56.  
  57.     outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO);
  58.     outb(0x20, PIC_LO);
  59. }
  60.  
  61. static void vnc_unmask_pic_lo_irq(unsigned int irq)
  62. {
  63.     unsigned int mask = ~(1 << (irq & 7));
  64.  
  65.     outb(inb(PIC_MASK_LO) & mask, PIC_MASK_LO);
  66. }
  67.  
  68. static void vnc_mask_pic_hi_irq(unsigned int irq)
  69. {
  70.     unsigned int mask = 1 << (irq & 7);
  71.  
  72.     outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
  73. }
  74.  
  75. static void vnc_mask_ack_pic_hi_irq(unsigned int irq)
  76. {
  77.     unsigned int mask = 1 << (irq & 7);
  78.  
  79.     outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI);
  80.     outb(0x62, PIC_LO);
  81.     outb(0x20, PIC_HI);
  82. }
  83.  
  84. static void vnc_unmask_pic_hi_irq(unsigned int irq)
  85. {
  86.     unsigned int mask = 1 << (irq & 7);
  87.  
  88.     outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI);
  89. }
  90.  
  91. static void no_action(int irq, void *dev_id, struct pt_regs *regs)
  92. {
  93. }
  94.  
  95. static struct irqaction irq_cascade = { no_action, 0, 0, "cascade", NULL, NULL };
  96.  
  97. static __inline__ void irq_init_irq(void)
  98. {
  99.     unsigned int irq;
  100.  
  101.     outb(0x11, PIC_LO);
  102.     outb(0x10, PIC_MASK_LO);
  103.     outb(0x04, PIC_MASK_LO);
  104.     outb(1, PIC_MASK_LO);
  105.  
  106.     outb(0x11, PIC_HI);
  107.     outb(0x18, PIC_MASK_HI);
  108.     outb(0x02, PIC_MASK_HI);
  109.     outb(1, PIC_MASK_HI);
  110.  
  111.     *CSR_IRQ_DISABLE = ~IRQ_MASK_EXTERN_IRQ;
  112.     *CSR_IRQ_ENABLE  = IRQ_MASK_EXTERN_IRQ;
  113.     *CSR_FIQ_DISABLE = -1;
  114.  
  115.     for (irq = 0; irq < NR_IRQS; irq++) {
  116.         irq_desc[irq].valid    = 1;
  117.         irq_desc[irq].probe_ok    = 1;
  118.  
  119.         if (irq < 16) {
  120.             irq_desc[irq].mask_ack    = vnc_mask_csr_irq;
  121.             irq_desc[irq].mask    = vnc_mask_csr_irq;
  122.             irq_desc[irq].unmask    = vnc_unmask_csr_irq;
  123.         } else if (irq < 24) {
  124. irq_desc[irq].probe_ok = 0;
  125.             irq_desc[irq].mask_ack    = vnc_mask_ack_pic_lo_irq;
  126.             irq_desc[irq].mask    = vnc_mask_pic_lo_irq;
  127.             irq_desc[irq].unmask    = vnc_unmask_pic_lo_irq;
  128.         } else {
  129. irq_desc[irq].probe_ok = 0;
  130.             irq_desc[irq].mask_ack    = vnc_mask_ack_pic_hi_irq;
  131.             irq_desc[irq].mask    = vnc_mask_pic_hi_irq;
  132.             irq_desc[irq].unmask    = vnc_unmask_pic_hi_irq;
  133.         }
  134.     }
  135.  
  136.     irq_desc[0].probe_ok = 0;
  137.     irq_desc[IRQ_SOFTIRQ].probe_ok = 0;
  138.     irq_desc[IRQ_CONRX].probe_ok = 0;
  139.     irq_desc[IRQ_CONTX].probe_ok = 0;
  140.     irq_desc[IRQ_TIMER0].probe_ok = 0;
  141.     irq_desc[IRQ_TIMER1].probe_ok = 0;
  142.     irq_desc[IRQ_TIMER2].probe_ok = 0;
  143.     irq_desc[IRQ_WATCHDOG].probe_ok = 0;
  144.     irq_desc[IRQ_DMA1].probe_ok = 0;
  145.     irq_desc[13].probe_ok = 0;
  146.     irq_desc[14].probe_ok = 0;
  147.     irq_desc[IRQ_PCI_ERR].probe_ok = 0;
  148.     irq_desc[IRQ_PIC_HI].probe_ok = 0;
  149.     irq_desc[29].probe_ok = 0;
  150.     irq_desc[31].probe_ok = 0;
  151.  
  152.     outb(0xff, PIC_MASK_LO);
  153.     outb(0xff, PIC_MASK_HI);
  154.  
  155.     setup_arm_irq(IRQ_PIC_HI, &irq_cascade);
  156. }
  157.